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Books by Kwang-Ting Cheng
  | | Delay Fault Testing for VLSI Circuits (Frontiers in Electronic Testing) by Angela Krstic, Kwang-Ting Cheng Hardcover, 191 Pages, Published 1998 by Springer ISBN-13: 978-0-7923-8295-9, ISBN: 0-7923-8295-1 "In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on ..." |
 | | Unified Methods for VLSI Simulation and Test Generation (The Springer International Series in Engineering and Computer Science) by Kwang-Ting Cheng, Vishwani D. Agrawal Hardcover, 148 Pages, Published 1989 by Springer ISBN-13: 978-0-7923-9025-1, ISBN: 0-7923-9025-3 "A VLSI Architecture for Concurrent Data Structures. WJ Dally. ISBN 0-89838-235-1 . ... Simulated Annealing for VLSI Design. DF Wong, HW Leong, and CL Liu. ..." |
 | | Formal Equivalence Checking and Design Debugging (Frontiers in Electronic Testing) by Shi-Yu Huang, Kwang-Ting Cheng, Kwant-Ting Cheng Hardcover, 229 Pages, Published 1998 by Springer ISBN-13: 978-0-7923-8184-6, ISBN: 0-7923-8184-X "Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. Some novel approaches to the problems of verifying design revisions after intensive sequential ..." |
 | | Formal Equivalence Checking and Design Debugging(Reprint) (Frontiers in Electronic Testing) by Shi-Yu Huang, Kwang-Ting Cheng Paperback, 229 Pages, Published 2012 by Springer ISBN-13: 978-1-4613-7606-4, ISBN: 1-4613-7606-8 "Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. Some novel approaches to the problems of verifying design revisions after intensive sequential transformations such as ret ..." |
 | | Electronic Design Automation(1st Edition) Synthesis, Verification, and Test (Systems on Silicon) by Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting Cheng Hardcover, 972 Pages, Published 2009 by Morgan Kaufmann ISBN-13: 978-0-12-374364-0, ISBN: 0-12-374364-8 "This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures o ..." |
 | | Design, Automation, and Test for Low-Power and Reliable Flexible Electronics (Foundations and Trends(r) in Electronic Design Automation) by Tsung-Ching Huang, Jiun-Lang Huang, Kwang-Ting Cheng Paperback, 128 Pages, Published 2014 by Now Publishers Inc ISBN-13: 978-1-60198-840-9, ISBN: 1-60198-840-0 "Flexible electronics are emerging as an alternative to conventional Si electronics for large-area low-cost applications such as e-paper, smart sensors, disposable RFID tags, and solar cells. By utilizing inexpensive manufacturing methods such as ink-jet printing and roll-to-roll imprinting, flexible electronics can be made on low-cost plastic films just like printing newspapers. However, the key elements of flexible electronics, thin-fi ..." |
 | | Design, Automation, and Test for Low-Power and Reliable Flexible Electronics by Tsung-Ching Huang, Jiun-Lang Huang, Kwang-Ting Cheng 112 Pages, Published 2015 ISBN-13: 978-1-60198-841-6, ISBN: 1-60198-841-9 "Flexible electronics are emerging as an alternative to conventional Si electronics for smart sensors, disposable RFID tags, and solar cells." |
 | | VLSI Test Principles and Architectures(1st Edition) Design for Testability (Morgan Kaufmann Series in Systems on Silicon (Hardcover)) by Laung-Terng Wang, Xiaoqing Wen, Cheng-Wen Wu, Abhijit Chatterjee, Xinghao Chen, William Eklow, Soumendu Bhattacharya, Rohit Kapur, Brion Keller, Xiaowei Li, Yinghua Min, Mehrdad Nourani, Janusz Rajski, Charles Stroud, Erik H. Volkerink, Kwang-Ting Cheng, Michael S. Hsiao, Jiun-Lang Huang, Shi-Yu Huang, Wen-Ben Jone, Kuen-Jong Lee, Mike Peng Li, T.M. Mak, Benoit Nadeau-Dostie, Duncan M. Walker, Shianling Wu, Nur A. Touba Hardcover, 808 Pages, Published 2006 by Morgan Kaufmann ISBN-13: 978-0-12-370597-6, ISBN: 0-12-370597-5 "This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. · Most up-to-date coverage of design for testability. · Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. · Numer ..." |
 | | Delay Fault Testing for VlSi Circuits(Reprint) (Frontiers in Electronic Testing) by Angela Krstic, Kwang-TingCheng Paperback, 208 Pages, Published 2012 by Springer ISBN-13: 978-1-4613-7561-6, ISBN: 1-4613-7561-4 "With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow with the current design trend of moving towards deep submicron devices. After a long period of prevailing belief that high stuck-at fault coverage is sufficient to guarantee high quality of shipped products, the ..." |
 | | Systems on Silicon Electronic Design Automation : Synthesis, Verification, and Test by Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting Cheng, Wei Wang Paperback, 972 Pages, Published 2009 by Morgan Kaufmann ISBN-13: 978-0-08-092200-3, ISBN: 0-08-092200-7 "This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of ..." |
 | | Dictionary of American Literary Characters(2nd Edition) (Facts on File Library of American Literature)(2 vol. set) by V. Franklin Benjamin, Fred Grayson, Angela Krstic, Kwang-Ting Cheng, American Bookworks Corporation, Benjamin Franklin Hardcover, 736 Pages, Published 2002 by Facts On File ISBN-13: 978-0-8160-4262-3, ISBN: 0-8160-4262-4 "A dictionary of characters from American literature. The two volumes cover more than two centuries of characters, from 1789, the date of the first American novel, through to the 20th century. There are more than 16,000 entries - over 5000 more than in the previous edition -spanning a broad scope of contemporary popular fiction, including characters from dozens of American novels published since 1980. Drawn from award-winning, best-selli ..." |
 | | Efficient Test Methodologies for High-Speed Serial Links (Lecture Notes in Electrical Engineering) by Dongwoo Hong, Kwang-Ting Cheng, Springer Publisher Staff Paperback, 98 Pages, Published 2012 by Springer ISBN-13: 978-94-007-3094-6, ISBN: 94-007-3094-2 "Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication syst ..." |
 | | Efficient Test Methodologies for High-Speed Serial Links (Lecture Notes in Electrical Engineering) by Dongwoo Hong, Kwang-Ting Cheng Hardcover, 98 Pages, Published 2009 by Springer ISBN-13: 978-90-481-3442-7, ISBN: 90-481-3442-0 "Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication syst ..." |
 | | Frontiers in Electronic Testing Ser. Delay Fault Testing for VLSI Circuits by Kwang-Ting (Tim) Kwang-Ting (Tim) Cheng and Angela Krstic (2012, E-book) by Angela Krstic, Kwang-Ting Cheng 191 Pages, Published 2012 by Springer Science & Business Media ISBN-13: 978-1-4615-5597-1, ISBN: 1-4615-5597-3 "Angela Krstic, Kwang-Ting (Tim) Cheng. [105] [106] [107] [108] [109] [110] [111] [ 112] [113] [114] W.-W. Mao and ... C. G. Parodi, V. D. Agrawal, M. L. Bushnell, and S. Wu. A NonEnumerative Path Delay Fault Simulator for Sequential Circuits." |
 | | Frontiers in Electronic Testing Formal Equivalence Checking and Design Debugging 12 by Shi-Yu Shi-Yu Huang and Kwang-Ting (Tim) Kwang-Ting (Tim) Cheng (2012, E-book) by Shi-Yu Huang, Kwang-Ting Cheng 229 Pages, Published 2012 by Springer Science & Business Media ISBN-13: 978-1-4615-5693-0, ISBN: 1-4615-5693-7 "Shi-Yu Huang, Kwang-Ting (Tim) Cheng. FORMAL EQUIVALENCE CHECKING AND DESIGN DEBUGGING by Shi-Yu Huang National Semiconductor Corporation and Kwang-Ting (Tim) Cheng University of California, Santa Barbara # SPRINGER SCIENCE+BUSINESS MEDIA, LLC Library of Congress Cataloging-in-Publication Huang, Shi-Yu, 1965Formal equivalence checking and ." |
 | | Lecture Notes in Electrical Engineering Ser. Efficient Test Methodologies for High-Speed Serial Links by Hong Dongwoo, Kwang-Ting Cheng 98 Pages, Published 2009 by Springer Science & Business Media ISBN-13: 978-90-481-3443-4, ISBN: 90-481-3443-9 "In addition, the phase response of the CDR circuit, which determines the timing response in clock recovery, has a very strong correlation to the BER. If the jitter frequency falls into the range in which the phase delay is non-zero, the CDR circuit introduces some timing delay to the recovered clock which will, in turn, contribute to the BER. Within a specific frequency range, this timing delay can cause a significant increase in t ..." |
 | | Efficient Test Methodologies for High-Speed Serial Links by Dongwoo Hong, Kwang-Ting Cheng Paperback, 98 Pages, Published 2010 by Springer Verlag Gmbh ISBN-13: 978-90-481-3459-5, ISBN: 90-481-3459-5 "Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage." |
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